1. Field of the Invention
The present invention relates to a high voltage semiconductor device and a method of fabricating the same, and more particularly, to a high voltage semiconductor device having a high breakdown voltage and a method of fabricating the same.
2. Description of the Related Art
A strong electric field is generated at the inside or edge of a high voltage device, which reduces the breakdown voltage of the high voltage device. A representative method of preventing a strong electric field from being generated at the edge of the high voltage device is to use a floating field ring (also called a field limiting ring). The floating field ring, which is formed around a main junction without any electric contact, reduces the concentration of an electric field at a cylindrical junction by extending the boundary of a depletion area which is formed by an application of a reverse bias to the main junction. To increase the effect of the floating field ring, a plurality of floating field rings can be formed and will be described with reference to FIG. 1.
FIG. 1 is a cross-sectional view of a junction termination of a high voltage semiconductor device using a plurality of field limiting rings. Referring to FIG. 1, an n+-type collector area 11 is formed on an n+-type collector area 10. A p-type base area 12 is formed on an upper surface of the n−-type collector area 11. An n+-type emitter area 13 is formed on an upper surface of the p-type base area 12. Meanwhile, a plurality of floating field rings 14a, 14b, and 14c, which are spaced apart from the p-type base area 12, are formed on the surface of the n−-type collector area 11. Only three floating field rings are shown in FIG. 1, however, more floating field rings may be formed. An n+-type channel stopper 15 is formed on an upper surface of the n−-type collector area 11 at regular intervals from the floating field ring 14c farthest from the p-type base area 12. An emitter electrode 16, a base electrode 17, a collector electrode 18 and an equipotential electrode 19 are formed to be electrically connected to the emitter area 13, the base area 12, the collector area 10, and the channel stopper 15, respectively. The electrodes 16, 17, 18, and 19 are insulated from one another by dielectric layers 20. Meanwhile, a plurality of plates 21a, 21b, and 21c are formed on the dielectric layer 20 above the floating field rings 14a, 14b, and 14c. 
In a high voltage semiconductor device having the above-described structure, in a case where reverse bias is applied to a pn junction formed by the n-type collector area 11 and the p-type base area 12, a depletion area extends to each area around the floating field rings 14a, 14b, and 14c. As a result, the concentration of an electric field at a cylindrical junction is reduced and thus the breakdown voltage of the device increases.
This method of using a plurality of floating field rings is effective in improving the breakdown voltage of devices, however, demands a wider junction termination area.
Besides this method of using floating field rings, a method of using field plates, etch contour technology, bevel edge termination technology, junction termination extension technology, variation lateral doping technology, and a method of using a semi-insulating polysilicon layer are well known as ways of preventing generation of a strong electric field at a junction terminal. However, these methods all demand a wide junction termination area to obtain a high breakdown voltage.